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Webinar Avestra Explains How to Achieve Assertion Driven Silicon Success

12 h ago

TSMC will host its 18th North America Open Innovation Platform (OIP) Ecosystem Forum on September 23, 2026, at the Santa Clara Convention Center, bringing together semiconductor designers, partners, and customers to explore how AI, advanced process nodes, and 3D packaging are reshaping chip design—key news for professionals tracking TSMC ecosystem developments, AI chip design, and advanced packaging trends. Themed “Expanding AI with Leadership Ecosystem,” the forum runs from 9 a.m. to 2:30 p.m. PT and covers design flows for TSMC’s N2, A16, and A14 processes, with emphasis on energy efficiency and multiphysics effects. Advanced packaging sessions will detail TSMC’s 3DFabric portfolio including InFO, CoWoS, SoIC, SoW, and TSMC-COUPE technologies, critical for integrating compute, memory, and connectivity in AI accelerators. Agentic AI workflows will be demonstrated by ecosystem partners to improve productivity in 2D and 3D IC design. Additional tracks address high-performance computing, automotive, mobile, IoT, and specialty platforms for ultra-low-power, RF, and millimeter-wave applications. The agenda includes TSMC keynotes, a guest speech, technical sessions, the OIP Partner of the Year Award luncheon, and an ecosystem pavilion. Customer case studies will highlight how collaboration, semiconductor IP, and cloud-based design environments shorten development cycles. The forum matters because it assesses whether the broader design ecosystem can turn ambitious process and packaging roadmaps into manufacturable products, directly impacting the cost, speed, and energy efficiency of future AI hardware, vehicles, and connected devices.